In manufacturing processes of a semiconductor device, conventionally, dry etching has been performed on a substrate such as a semiconductor wafer (hereinafter, referred to as a wafer) for, e.g., separating capacitors or elements, or forming contact holes. A single sheet parallel plate type plasma processing apparatus is known as an apparatus performing such a process (see, e.g., reference patents 1 and 2).
The above-mentioned apparatus will be described briefly with reference to FIG. 28. The plasma apparatus includes an upper electrode 11 serving also as a gas shower head and a lower electrode 12 serving also as a mounting table at an upper side and lower side of an airtight vessel 1, respectively. Further, a silicon ring 13 at an inner side and a quartz ring 14 at an outer side are installed to surround the wafer W on the mounting table 12. The wafer on the mounting table (the lower electrode) is etched by applying a bias voltage to the lower electrode 12 from a high frequency power supply 16 and performing vacuum exhaust through a gas exhaust port 17 to keep a predetermined pressure, while, at the same time, a high frequency voltage is applied between the upper and lower electrodes 11 and 12 by a high frequency power supply 15; and a processing gas from the gas shower head (the upper electrode) 11 is converted into plasma.
Functions of the silicon ring 13 and the quartz ring 14 will hereinafter be described. The processing gas arriving at the proximity of the surface of the wafer W is diffused toward the periphery of the wafer W and exhausted from outside the periphery toward the bottom. Therefore, a gas flow of the processing gas at the peripheral portion (around the periphery) of the wafer W is different from that at the central portion of the wafer W, disturbing a balance of a predetermined composition in the processing gas at the peripheral portion of the wafer W. Further, the component of impedance, conductance or the like between the plasma and the lower electrode at an area on which the wafer W is disposed differs from those at outside the area, respectively. As a result, the plasma state above a nearby area of the wafer's periphery is different from that above inside of the wafer's periphery.
On the other hand, high in-surface uniformity of an etching rate needs to be achieved because of a strong need to form devices even in the area close to the periphery of wafer W in order to increase utilization. Accordingly, a ring member (referred to as a focus ring or the like) formed of a conductor, semiconductor or dielectric substance is disposed outside the wafer W to adjust the plasma density above the peripheral portion of the wafer W. Specifically, a focus ring material is selected; and width, height or the like of the ring is adjusted according to the material of a to-be-etched film, the magnitude of a supply power or the like when installing a focus ring suitable for the process (see, e.g., reference patent 3).
As one example in the above-mentioned reference patents, a silicon ring is used when etching a silicon oxide film, and, for example, an insulator, such as quartz or the like, is used when etching polysilicon.    reference patent 1: Japanese Patent Laid-Open Publication No. 8-335568 (pages 3-4, FIG. 2)    reference patent 2: Japanese Patent Laid-Open Publication No. 2000-36490 (page 5, FIG. 3)    reference patent 3: Japanese Patent Laid-Open Publication No. 8-162444 (page 5, FIG. 2)